This tutorial describes basic scenarios of debugging Data Parallel C++ (DPC++) and OpenCL™ applications on a CPU, GPU, and an FPGA emulator using Intel® Distribution for GDB*.
Check the Get Started Guide and complete all setup steps depending on whether you aim at debugging on a CPU or a GPU.
In comparison to debugging on a CPU, debugging a kernel on a GPU has a few differences:
All threads are vectorized and process several data elements simultaneously, if possible.
An execution channel (SIMD lane) is referred to as a logical unit of execution for accessing data elements within an instruction. When kernels are compiled in debug mode, most SIMD instructions have 8 execution channels. This is referred as the SIMD width.
Inferior calls (calling kernel functions from inside the debugger as part of expression evaluation) are not supported.