Intel® oneAPI Math Kernel Library Developer Reference - C

mkl_graph_transpose

Computes a (masked) transpose of a graph matrix.

Syntax

mkl_graph_status_t mkl_graph_transpose (mkl_graph_matrix_t C, mkl_graph_matrix_t Mask, mkl_graph_accumulator_t accum, mkl_graph_matrix_t A, mkl_graph_descriptor_t desc);

Include Files

Description

The mkl_graph_transpose routine computes a (masked) transpose of a graph matrix. An optional mask can be provided through the Mask parameter. Also, an optional binary operator can be passed through accum parameter to be used as an accumulator. The transposition operation can be modified by a desc parameter.

For example, setting the value MKL_GRAPH_MOD_ONLY_STRUCTURE for the output field of the descriptor will make the operation ignore the values of the matrix and create transposed data only for the matrix structure.

Note

Only in-place transposition (when the output matrix C is the same as the input matrix A) is supported currently.

Input Parameters

Mask

A graph matrix which will be used as a mask. Ignored if NULL.

Note

Currently, mask is not supported by this operation.

accum

Binary operator to be used as an accumulator. Refer to Graph API Glossary for a list of possible options.

Note

Currently only MKL_GRAPH_ACCUMULATOR_NONE is supported by this routine.

A

A graph matrix to be transposed.

desc

An operation descriptor. Refer to Graph API Glossary for a list of possible options. If NULL, no extra modifiers are used for the operation.

Output Parameters

C

A graph matrix which holds the transposed data of the input matrix (with modifications as provided through the operation descriptor).

Return Values

The function returns a value indicating whether the operation was successful or not and why. Refer to Graph API Glossary for a list of possible options.

Optimization Notice

Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice.

Notice revision #20110804

This notice covers the following instruction sets: SSE2, SSE4.2, AVX2, AVX-512.